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Please use this identifier to cite or link to this item: http://hdl.handle.net/11375/25374
Title: Design of Time-Gated CMOS SPADs Towards High-Performance Imagers
Other Titles: Design of CMOS SPADs Towards High-Performance Imagers
Authors: Chalich, Yamn
Advisor: Deen, Jamal
Department: Electrical and Computer Engineering
Publication Date: 2020
Abstract: SPAD (Single-Photon Avalanche Diode) sensors, capable of detecting down to the single photon level for ultimate sensitivity, have shown great promise as the photodetector of choice for next-generation devices used in positron emission tomography, fluorescence lifetime imaging, light detection and ranging, and more. SPAD fabrication has shifted recently towards custom technologies, 3D stacked designs, and post-processing steps (micro-lenses) to improve performance at the expense of increased cost and complexity. This thesis explores time-gating and multi-junction techniques to improve SPAD performance in standard planar CMOS (Complementary Metal-Oxide-Semiconductor) processes to take advantage of their potential for monolithic integration with other mixed-signal circuitry for simple, low-cost, high-performance imaging solutions. An unbuffered triple-junction SPAD was fabricated to investigate the potential for wavelength distinction, however the top two junctions (n+/p-well and p-well/deep n-well) showed excessive noise, and the deepest junction exhibited a similar spectral response to the top junction, potentially due to a large influence from the process layers over the active area. A time-gated SPAD pixel based on the top junction was also designed and fabricated in the TSMC standard 65 nm CMOS process with a fill-factor of 28.6%. At an excess voltage of 300 mV, it achieved a peak photon detection efficiency of ~3.5% at 440 nm, <1% afterpulsing probability for hold-off times >22ns, and <200 ps timing jitter. Lastly, the potential for high-performance CMOS imaging systems was demonstrated through the development of a prototype open-source, low-cost, highspeed camera built with standard commodity hardware. It achieved 211 frames per second (fps) at its maximum resolution of 1280x1024, and up to 2329 fps at a 256x256 resolution, with a cost well under $1000 USD. It was found to be very competitive to current low-cost, commercial highspeed cameras using a new figure-of-merit comparison and was tested for biological microscopy applications involving C. elegans worms.
URI: http://hdl.handle.net/11375/25374
Appears in Collections:Open Access Dissertations and Theses

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