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Verifying Permutation Rewritable Hazard Free Loops

dc.contributor.advisorAnand, Christopheren_US
dc.contributor.advisorKahl, Wolframen_US
dc.contributor.advisorSoltys, Michaelen_US
dc.contributor.authorDobrogost, Michalen_US
dc.contributor.departmentComputer Scienceen_US
dc.date.accessioned2014-06-18T16:52:27Z
dc.date.available2014-06-18T16:52:27Z
dc.date.created2011-08-04en_US
dc.date.issued2011-10en_US
dc.description.abstract<p>We present an extension to the language of Atomic Verifiable Operation (AVOp) streams to allow the expression of loops which are rewritable via an arbitrary permutation. Inspired by (and significantly extending) hardware register rotation to data buffers in multi-core programs, we hope to achieve similar performance benefits in expressing software pipelined programs across many cores. By adding loops to AVOp streams, we achieve significant stream compression, which eliminates an impediment to scalability of this abstraction. Furthermore, we present a fast extension to the previous AVOp verification process which ensures that no data hazards are present in the program’s patterns of communication. Our extension to the verification process is to verify loops without completely unrolling them. A proof of correctness for the verification process is presented.</p>en_US
dc.description.degreeMaster of Science (MSc)en_US
dc.identifier.otheropendissertations/5780en_US
dc.identifier.other6745en_US
dc.identifier.other2133191en_US
dc.identifier.urihttp://hdl.handle.net/11375/10755
dc.subjectparallelism multicore verification permutation high-performance computingen_US
dc.subjectNumerical Analysis and Scientific Computingen_US
dc.subjectNumerical Analysis and Scientific Computingen_US
dc.titleVerifying Permutation Rewritable Hazard Free Loopsen_US
dc.typethesisen_US

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