D.C. Modelling of Segmented Lateral P-N-P Transistors

Abstract

<p> An approximate model has been developed for the p-n-p lateral segmented transistor, and used to characterize the behaviour of the common-emitter dc current gain to the collector segment when the control segment is set to arbitrary voltage levels. The model is a development of the type introduced by Ebers and Moll. </p> <p> The dc current gain is found to be a sensitive function of the control segment voltage, and for changes in this voltage level of the order of± 200mV, it can be made to vary between two limiting values which are dependent on device geometry. A number of applications for this device have been suggested, particularly where an a.g.c. function or controlled current source requirement are needed. </p> <p> An analytic expression has been obtained for the controlled hFE in terms of the control segment voltage and the device parameters, using an approximate analogue for the device geometry. The results have been found to describe the behaviour for a family of p-n-p lateral transistors, having circular geometry with different segment periphery ratios, within the limits of the approximations and experimental errors. </p>