Performance considerations in high-speed TDFA-band silicon photonic micro-ring resonator modulators

Abstract

The ever-increasing bandwidth requirements to support telecommunications infrastructure necessitates large-scale fabrication of low-cost and scalable silicon photonic integrated circuits. Wavelength-division multiplexing (WDM) schemes are fundamentally limited in the number of channels supported in long-haul transmission by the erbium doped fiber amplifier (EDFA). To address this, researchers have turned focus toward the thulium doped fiber amplifier (TDFA), which provides 3× more bandwidth. This thesis describes the development of high-speed silicon-on-insulator (SOI) micro-ring resonator (MRR) modulators optimized for wavelengths in the TDFA band. Chapter 2 presents a theoretical performance comparison between MRR modulators designed for optimized use at EDFA and TDFA wavelengths. Chapter 3 presents an experimental study of optical loss mechanisms at extended wavelengths which suggests reduced waveguide scattering and enhanced divacancy defect absorption as well as larger bending and substrate leakage losses when compared with shorter wavelengths. An electronic variable optical attenuator is characterized in Chapter 4 to experimentally verify the predicted 1.7× TDFA-band free-carrier effect enhancement over EDFA-band wavelengths. The first steady-state operation of an MMR modulator near a central wavelength of 1.97 µm is also demonstrated under the enhanced free-carrier effect. Chapter 5 demonstrates the first high-speed reverse bias operation of an MRR modulator with a measured bandwidth of 12.5 GHz, and an on-chip optical link consisting of a modulator followed by a defectmediated detector with open eye-diagrams up to data rates of 12.5 Gbps. Chapter 6 introduces an electrically-driven post-fabrication defect-assisted resonance trimming technique via local annealing for use in MRR devices. Chapter 7 presents a Monte Carlo simulation of resonance alignment in multi-MRR systems subjected to spatially-correlated wafer variation created through the Virtual Wafer Model process to predict thermal power consumption and power reduction through resonance trimming.