Modeling the Saturated Bipolar Transistor

Abstract

<p>In this paper an analysis of the saturated bipolar transistor is presented, in the situation where the dc collector current is zero or close to zero. In this particular case, the device is referred to as a zero-biased transistor (ZBT). The analysis is based on a version of the integral charge-control model of Gummel and Poon.</p> <p>Through analytic solution of the model equations and computer simulation, the dc collector-emitter voltage, small-signal collector-emitter conductance, and second and third-order nonlinear distortion are examined over a wide range of base currents. Both the ac and dc characteristics are found to be dominated by different physical phenomena at different levels of IB. The effects of the parasitic substrate transistors on device operation are also examined. Criteria for acceptable performance are established with a view towards practical applications.</p> <p>A number of applications for the ZBT have been suggested, particularly where a low-power small-signal variable-impedance element is required. Perfomance of the device in small-signal attenuator and a feedback amplifier are discussed. The effects of a fixed parallel resistance and a finite base-drive impedance on device performance are investigated.</p> <p>The results are found to describe the measured dc behaviour at low and moderate base currents for a family of lateral p-n-p transistors having symmetric forward and reverse-active properties. Similarly, low-frequency ac behaviour is well described at low and moderate base currents. Suggestions for future work are included.</p>