Performance Simulation with the Coconut 1ulticore Framework for the Cell/B.E.

Abstract

<p>The multicore revolution in chip design has fundamentally altered the demands placed on developers. Thread-level parallelism is critical to optimizing software performance on multicore chips. However thread-level parallelism presents challenges with respect to optimization, safety and program representation. Program models and compiler technologies must act as a bridge from applications to efficient hardware usage.</p> <p>Coconut (COde CONstructing User Tool) is an ongoing project at McMaster to develop a platform for experimenting with novel ideas in reliable and high performance code generation, currently targeting the Cell/B.E.. The Coconut Multicore Framework uses a virtual machine abstraction layer to model multicore layer parallelism on the Cell/B.E.. The abstraction creates a correspondence between ILP and multicore layers of parallelism. The abstraction also allows us to perform efficient static analysis of virtual machine programs; with this ability we have developed a tool to automatically check for parallel bugs in linear time with respect to the atomic virtual machine instructions.</p> <p>In this thesis we will discuss the creation of a performance simulation tool developed to simulate the execution of our virtual machine instructions on a Cell/B.E.. The tool has scalability to future many-core architectures, due to its linearly bounded runtime complexity. The tool allows for Coconut developers to contrast the performance of different scheduling algorithms. It provides meaningful feedback as to optimization opportunities by identifying data transfer latencies which cause execution to stall. The design and performance testing results of the performance simulation tool are presented.</p>