Design of Linear Array Geometry for High Resolution Array Processing

Abstract

<p>The linear array is one of the most important types of multi-element sensor arrays, being extensively used in radar, sonar, telecommunications, radio astronomy and medical imaging systems. Traditionally, the array assumes uniform geometry with an inter-sensor spacing of λ/2, which limits resolvability because of the fixed aperture. Since the 1950's, much work has been done on designing nonuniform arrays with focus on conventional beamforming techniques. One of the typical results is the Minimum Redundancy (MR) arrays which provide improved performance over the uniform array.</p> <p>In this thesis, this issue is re-investigated from the viewpoint of high resolution array processing. A new criterion (called DOBC), based on D-Optimality, is developed, which yields a new array geometry by minimizing a measure of joint estimation error with respect to the array geometry parameters. The sensor gain and phase calibration errors and their effects on high resolution array signal processing are also examined, and formulae are developed to evaluate such effects.</p> <p>In addition, the Modified Forward-Backward Linear Prediction (MFBLP) method is modified to substantially improve the low SNR performance without increase in computational load. A form of Cramer-Rao lower bound (CRLB) is derived for a reduced model which facilitates performance comparisons in directions of arrival (DOA) estimation.</p> <p>Computer experiments are conducted to verify our analysis. We conclude that (1) the DOBC design outperforms the conventional uniform array and the MR array; (2) the formulae developed predict very well the behaviour of high resolution algorithms in the presence or absence of calibration errors. The design criterion and formulae can be used by the system designer to design a new array geometry given the performance requirement and hardware specifications, to evaluate the expected performance of an array, given information about hardware specifications, or to develop hardware specifications given the performance requirement.</p>