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Please use this identifier to cite or link to this item: http://hdl.handle.net/11375/8937
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dc.contributor.advisorAnand, Christopheren_US
dc.contributor.authorBrowne, Kevinen_US
dc.date.accessioned2014-06-18T16:44:46Z-
dc.date.available2014-06-18T16:44:46Z-
dc.date.created2011-05-16en_US
dc.date.issued2009en_US
dc.identifier.otheropendissertations/4103en_US
dc.identifier.other5124en_US
dc.identifier.other2014959en_US
dc.identifier.urihttp://hdl.handle.net/11375/8937-
dc.description.abstract<p>The multicore revolution in chip design has fundamentally altered the demands placed on developers. Thread-level parallelism is critical to optimizing software performance on multicore chips. However thread-level parallelism presents challenges with respect to optimization, safety and program representation. Program models and compiler technologies must act as a bridge from applications to efficient hardware usage.</p> <p>Coconut (COde CONstructing User Tool) is an ongoing project at McMaster to develop a platform for experimenting with novel ideas in reliable and high performance code generation, currently targeting the Cell/B.E.. The Coconut Multicore Framework uses a virtual machine abstraction layer to model multicore layer parallelism on the Cell/B.E.. The abstraction creates a correspondence between ILP and multicore layers of parallelism. The abstraction also allows us to perform efficient static analysis of virtual machine programs; with this ability we have developed a tool to automatically check for parallel bugs in linear time with respect to the atomic virtual machine instructions.</p> <p>In this thesis we will discuss the creation of a performance simulation tool developed to simulate the execution of our virtual machine instructions on a Cell/B.E.. The tool has scalability to future many-core architectures, due to its linearly bounded runtime complexity. The tool allows for Coconut developers to contrast the performance of different scheduling algorithms. It provides meaningful feedback as to optimization opportunities by identifying data transfer latencies which cause execution to stall. The design and performance testing results of the performance simulation tool are presented.</p>en_US
dc.subjectComputing and Softwareen_US
dc.subjectComputer Engineeringen_US
dc.subjectComputer Engineeringen_US
dc.titlePerformance Simulation with the Coconut 1ulticore Framework for the Cell/B.E.en_US
dc.typethesisen_US
dc.contributor.departmentComputing and Softwareen_US
dc.description.degreeMaster of Science (MS)en_US
Appears in Collections:Open Access Dissertations and Theses

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