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|Title:||The Characterization of Thin Heavily Doped Layers in Silicon|
|Authors:||Jones, Erle John|
|Keywords:||Electrical and Electronics;Electrical and Electronics|
|Abstract:||<p>The electrical characteristics of a thin heavily doped layer in silicon were determined.</p> <p>A p⁺ 200 Ω/ m junction depth boron diffusion in a 2 Ω cm n-type phosphorous doped substrate was considered a typical thin heavily doped layer. This layer is of considerable practical importance being a standard base and resistor diffusion in planar processing.</p> <p>To completely characterize the heavily doped layer, it was necessary to study the layers on either side; substrate and thermal oxide; and their interfaces with the heavily doped layer. The resultant structure was examined by means of MOS C-V, oxide leakage and breakdown, Hall effect, p-n junction characterization, and differential sheet resistivity using anodic sectioning and a four-point probe. These tests yielded the impurity profile, the transport and recombination properties of the substrate, the dielectric constant thickness, breakdown field and leakage current of the oxide and the properties of the substrate diffused layer interface. However, the properties of the heavily doped layer and its interface with the oxide were still unknown. To find them, an experimental procedure utilizing a new test structure was introduced.</p> <p>The test structure consisted of an MOS capacitor formed over a heavily doped layer. The layer in turn formed one side of a p-n junction diode. The resultant structure was an MOS capacitor-emitter transistor (MOSCET). In operation, the p-n junction was reverse biased and became a minority carrier collector, while the MOS capacitor was biased into inversion for a controlled length of tire during which minority carriers were generated and formed the inversion layer. A voltage pulse applied to the MOS capacitor caused it to release minority carriers from the inversion layer. The carriers were transported across the layer under the combined influence of diffusion, and internal fields to the p-n junction where the charge that had not recombined during transit was collected.</p> <p>The theoretical behaviour of the MOSCET was determined. First a MOS capacitance program was used to determfne the inversion charge as a function of the bias voltage. Then a model of the device was developed to explain the transient response when no inversion charge was present. A finite difference formulation was used to account for the minority carrier transport across, and recombination in, the diffused layer. A time dependent release mechanism was introduced as a boundary condition which included values calculated in the non-inversion response. The result was a self consistent model of the MOSCET which also agreed with the other experimental data available.</p> <p>The MOSCET can be used to study two other phenomena as well as the characterization of thin heavily doped layers. This structure supplies the only direct confirmation of the relationship between inversion charge and bias voltage on the MOS capacitor. A study of the avalanche properties p-n junctions can be made, at very low multiplication values, with the MOSCET since the number of injected carries is so well known.</p> <p>Measurements on the MOSCET yield the following properties of thin heavily doped layers.</p> <p>(1) The minority carrier generation lifetime near the interface.</p> <p>(2) The generation centre energy level.</p> <p>(3) The average minority carrier recombination lifetime in the layer.</p> <p>(4) The transport properties across the layer.</p> <p>(5) The inversion potential.</p> <p>(6) The fixed oxide charge density.</p> <p>(7) The insulator stability.</p> <p>These properties combined with those determined by the other techniques provide the most complete electrical characterization of the thin heavily doped layer to date.</p>|
|Appears in Collections:||Open Access Dissertations and Theses|
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