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http://hdl.handle.net/11375/29766
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DC Field | Value | Language |
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dc.contributor.advisor | Hassan, Mohamed | - |
dc.contributor.author | Derakhshani, Fatemeh | - |
dc.date.accessioned | 2024-05-07T20:01:05Z | - |
dc.date.available | 2024-05-07T20:01:05Z | - |
dc.date.issued | 2024 | - |
dc.identifier.uri | http://hdl.handle.net/11375/29766 | - |
dc.description.abstract | Modern computing systems are exhibiting increasing computing elements with several co-running workloads. These workloads exhibit highly diverse memory access patterns and have different memory requirements. Nonetheless, main memory architectures are still oblivious to this diversity, handling all requests with the same set of rules. Memory mapping is a clear example of this failing "one-size-fits-all" memory approach. Encompassing several parallelism levels (channels, ranks, groups, and banks), the memory performance of an application depends heavily on its particular memory access pattern and how it is mapped to these levels. In contrast, current memory controllers (MCs) deploy a fixed address mapping for all applications, which leaves significant performance opportunities if each application is serviced with the suited mapping. Instead of following the prior approach of attempting to dynamically change the address mapping, which has significant limitations due to the need for data migrations, this thesis promotes the idea of considering main memory as an independent federated set of resources, which we call islands. Based on this idea, it introduces 1) a methodology to decide the address mapping that maximizes the performance of each application; 2) an optimization framework to statically define this federation of islands for each set of co-running workloads; and 3) finally, a software-aware co-design methodology to configure the MC with the various memory islands and their corresponding address mappings. Our extensive evaluation with a diverse set of more than 80 workloads and several single- and multi-core system setups show a significant performance improvement over the best compared static mapping when deploying the proposed technique. | en_US |
dc.language.iso | en | en_US |
dc.title | MEMORYISLANDS: A FEDERATED APPROACH FOR EFFICIENT MEMORY MAPPINGS | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | Electrical and Computer Engineering | en_US |
dc.description.degreetype | Thesis | en_US |
dc.description.degree | Master of Applied Science (MASc) | en_US |
dc.description.layabstract | The contemporary landscape of computing systems witnesses a surge in compute elements, often juggling multiple concurrent workloads. These workloads present a kaleidoscope of memory access patterns and diverse memory requirements. Despite this, main memory architectures persist in employing a uniform approach, treating all requests alike. This approach is exemplified in memory mapping, where a singular mapping strategy is applied across various parallelism levels. However, this blanket approach neglects performance nuances inherent in individual application memory access patterns. Departing from conventional methods that attempt dynamic mapping changes, this thesis proposes a novel perspective: treating main memory as a federation of independent resources, or ”islands.” It presents a methodology to optimize address mapping for each application, an optimization framework for defining these memory islands, and a software-aware codesign strategy to configure memory controllers accordingly. Extensive evaluation across a spectrum of workloads demonstrates substantial performance enhancements compared to other mapping approaches. | en_US |
Appears in Collections: | Open Access Dissertations and Theses |
Files in This Item:
File | Description | Size | Format | |
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derakhshani_fatemeh_202404_M.A.Sc.pdf | 3.31 MB | Adobe PDF | View/Open |
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