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Please use this identifier to cite or link to this item: http://hdl.handle.net/11375/29192
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dc.contributor.advisorNicolici, Nicola-
dc.contributor.authorRahman, Mushfiqur-
dc.date.accessioned2023-11-21T16:23:01Z-
dc.date.available2023-11-21T16:23:01Z-
dc.date.issued2023-
dc.identifier.urihttp://hdl.handle.net/11375/29192-
dc.description.abstractDue to advances in digital computing much of the baseband signal processing of a communication system has moved into the digital domain from the analog domain. Within the domain of digital communication systems, Software Defined Radios (SDRs) allow for majority of the signal processing tasks to be implemented in reconfigurable digital hardware. However this comes at a cost of higher power and resource requirements. Therefore, highly efficient custom hardware implementations for SDRs are needed to make SDRs feasible for practical use. Efficient custom hardware motivates the use of fixed point arithmetic in the implementation of Digital Signal Processing (DSP) algorithms. This conversion to finite precision arithmetic introduces quantization noise in the system, which significantly affects the performance metrics of the system. As a result, characterizing quantization noise and its effects within a DSP system is an important challenge that needs to be addressed. Current models to do so significantly over-estimate the quantization effects, resulting in an over-allocation of hardware resources to implement a system. Polynomial Chaos Expansion (PCE) is a method that is currently gaining attention in modelling uncertainty in engineering systems. Although it has been used to analyze quantization effects in DSP systems, previous investigations have been limited to simple examples. The purpose of this thesis is to therefore introduce new techniques that allow the application of PCE to be scaled up to larger DSP blocks with many noise sources. Additionally, the thesis introduces design space exploration algorithms that leverage the accuracy of PCE simulations to estimate bitwidths for fixed point implementations of DSP systems. The advantages of using PCE over current modelling techniques will be presented though its application to case studies relevant to practice. These case studies include Sine Generators, Infinite Impulse Response (IIR) filters, Finite Impulse Response (FIR) filters, FM demodulators and Phase Locked Loops (PLLs).en_US
dc.language.isoenen_US
dc.subjectpolynomial chaos expansionsen_US
dc.subjectwordlength optimizationen_US
dc.subjectaffine arithmeticen_US
dc.subjectinterval arithmeticen_US
dc.subjectsignal processingen_US
dc.subjectdigital communication systemsen_US
dc.subjectsoftware defined radioen_US
dc.subjectfield programmable gate arrayen_US
dc.subjectfpgaen_US
dc.subjectnumerical precisionen_US
dc.titleEstimation of Wordlengths for Fixed-Point Implementations using Polynomial Chaos Expansionsen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.degreetypeThesisen_US
dc.description.degreeMaster of Applied Science (MASc)en_US
Appears in Collections:Open Access Dissertations and Theses

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