Please use this identifier to cite or link to this item:
http://hdl.handle.net/11375/21090
Title: | Symbolic Timing Analysis of Real-Time Systems |
Authors: | Pavlidis, Mark H. |
Advisor: | Lawford, Mark |
Department: | Business |
Publication Date: | Sep-2006 |
Abstract: | <p>Timing analysis of a real-time control program is often required to verify that the system meets timing requirements. For example, if a real-time control program responds too slowly or too quickly, then the system may become unstable and fail. Traditional methods to determine timing bound estimates are often restrictive, labour-intensive, and error-prone. This thesis proposes an automated method of obtaining best- and worst-case timing bounds on unstructured assembly code without the need for manual annotation of loop or recursive call bounds. A prototype tool suite takes an assembly program as input and then generates the static control-flow graph. The generated static control-flow graph is then automatically translated into a timed automata model that models instruction processing times and adds variables to model the processor state. The resulting timed automata's transition relation represents the dynamic control-flow graph of the program. Fastest and slowest trace algorithms in recent prototype versions of UPPAAL, a timed automata model checker, are then used to extract tight best- and worst-case execution times of the program. The method is applied to code examples for two different low-end (i.e., no cache or pipeline) 8 and 16-bit microcontroller architectures, the PIC and IBM1800.</p> |
Description: | Title: Symbolic Timing Analysis of Real-Time Systems, Author: Mark H. Pavlidis, Location: Thode |
URI: | http://hdl.handle.net/11375/21090 |
Appears in Collections: | Digitized Open Access Dissertations and Theses |
Files in This Item:
File | Description | Size | Format | |
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Pavlidis_Mark_H_2006_09_master.pdf | Title: Symbolic Timing Analysis of Real-Time Systems, Author: Mark H. Pavlidis, Location: Thode | 32.52 MB | Adobe PDF | View/Open |
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